Wicher 520EC
Manufacturer
7-bit, Poland
Date
2021
Amiga
A500, A500+
Interface
68000 socket
    Processor
  • 68EC020 CPU @ 25 or 33 MHz, soldered in
  • CPU is refurbished
  • guaranteed clock speed is 25 MHz, 33 MHz might not work
    Memory
  • expansion provides 11 MB FastRAM
  • 16 MB SDRAM memory, soldered to the board
    IDE Controller
  • A600 compatible IDE controller
  • 1× 44 pin IDE pin header to connect 2.5" HDDs
  • requires Kickstart ≥v2.05 (37.350), recommended is Kickstart v3.1
    Notes
  • battery-backed real-time clock (CD2032 battery)
  • can be upgraded with SPI modules, e.g. RTC, Ethernet, MP3 codec or SD-Card expansions
  • MapROM (Kickstart ROM in FastRAM) and BootROM function
  • installs into the 68000 socket
  • can be configured by software:
    • set CPU clock
    • enable/disable CPU cache
    • enable/disable 1.5 MB Trapdoor RAM ($C00000)
    • enable/disable 1.5 MB A0 RAM ($A00000)
    • enable/disable MapROM
    • enable/disable BootROM
    • enable/disable IDE interface
    • enable/disable SPI interface
    • display version information
  • jumper connections have to be made to two chips on the motherboard
    • INT2: connection to Odd CIA (A) pin 21 (location U7)
    • OVR: connection to Gary pin 26 (location U5)
Manual
Driver / Installation Disk